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equipment:embedded:voipac_pxa270_baseboard

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Voipac PXA270 Baseboard

Pxa270 DMA

  • 32 DMA channels, DMA[31:0]
  • supports flow-through and fly-by transfer
  • 32 channels, 68 PBP (peripherial-bus peripherals) requests, 3 IBP (internal-bus peripherals, only quick-capture interface in this chip) requests, and 3 external device requests.

Приотритеты каналов

Set Channels Priority Number of Times Served
0 0, 1, 2, 3, 16, 17, 18, 19 I (High) 4/8
1 4, 5, 6, 7, 20, 21, 22, 23 II 2/8
2 8, 9, 10, 11, 24, 25, 26, 27 III 1/8
3 12, 13, 14, 15, 28, 29, 30, 31 IV 1/8

Flow-through DMA

For a flow-through DMA read/write from/to an internal peripheral, use the following settings for the DMA controller register bits:

Read:
DCMDx[FLYBYS] and DCMDx[FLYBYT] = 0
DSADRx[SRCADDR] = memory address
DTADRx[TRGADDR] = internal peripheral address
DCMDx[INCSRCADDR] = 1
DCMDx[INCTRGADDR] = 0
DCMDx[FLOWSRC] = 0
DCMDx[FLOWTRG] = 1

Write:
DCMDx[FLYBYS] and DCMDx[FLYBYT] = 0
DSADRx[SRCADDR] = internal peripheral address
DTADRx[TRGADDR] = memory address
DCMDx[INCSRCADDR] = 0
DCMDx[INCTRGADDR] = 1
DCMDx[FLOWSRC] = 1
DCMDx[FLOWTRG] = 0
equipment/embedded/voipac_pxa270_baseboard.1327385807.txt.gz · Последние изменения: 2012/11/30 12:38 (внешнее изменение)