#define MASTER_CLOCK		(200000000/2)
#define PLL_LOCK_TIMEOUT	1000000
#define PLLA_SETTINGS	0x2031BF03
#define PLLB_SETTINGS	0x10073F01
/* Switch MCK on PLLA output PCK = PLLA = 2 * MCK */
#define MCKR_SETTINGS	(AT91C_PMC_CSS_PLLA_CLK | AT91C_PMC_PRES_CLK | AT91C_PMC_MDIV_2)
#define AT91C_SPI_CLK 		 33000000
#define DATAFLASH_TCSS		(0x1a << 16)	/* 250ns min (tCSS) <=> 12/48000000 = 250ns */
#define DATAFLASH_TCHS		(0x2 << 24)	/* 250ns min (tCSH) <=> (64*1+SCBR)/(2*48000000) */
#define AT91C_SPI_PCS_DATAFLASH		AT91C_SPI_PCS0_DATAFLASH	/* Boot on SPI NCS0 */
#define IMG_ADDRESS 		0x8000			/* Image Address in DataFlash */
#define	IMG_SIZE		0x30000			/* Image Size in DataFlash    */
#define JUMP_ADDR		0x21D00000		/* Final Jump Address 	      */